时序发生器,Timing Generator
1)Timing Generator时序发生器
1.The architecture of the Linear CCDTiming Generator was analyzed.系统使用单片机作为控制单元,使用在系统可编程器件设计了CCD的时序发生器,使用模数转换器AD9243和FIFO缓存器构成高速数据采集系统。
2)synthesized sequence generator综合时序发生器
3)Driving schedule generator驱动时序发生器
1.Design on driving schedule generator for high-speed CCD cameradriving and its achievement based on CPLD technology;高速CCD摄像机驱动时序发生器的设计及基于CPLD技术的实现
2.Design of driving schedule generator for area array CCD based on CPLD;基于CPLD的面阵CCD驱动时序发生器设计
3.Driving schedule generator is described with VHDL.在分析e2v公司的CCD47-20 Backthinned NIMO型CCD器件驱动时序关系的基础上,设计了可调帧频和曝光时间的空间面阵CCD相机驱动时序发生器及其硬件电路。
4)Sequential pulse generator时序脉冲发生器
5)memory timing generator内存时序发生器
6)bit sequence generator序列发生器
1.This paper presents a method ofbit sequence generator based on chaotic system,In order to overcome short period resulted from the finite precision in practical application,we amend the output of chaotic sequence periodically so as to lengthen the period of the sequence and make the period of the sequ.该文提出一种0-1序列发生器的设计方法,该方法通过混沌系统产生混沌序列并粗粒化,从而产生出符号序列(即0-1序列)。
英文短句/例句
puterized sequencer计算机化序列发生器
2.A Search of Chaotic Sequence Generator and Chaotic Spread Spectrum Sequence;混沌序列发生器与混沌扩频序列的研究
3.spread-spectrum code-sequence generator展宽频谱代码序列发生器
4.pseudo-random binary sequence generator伪随机二进制序列发生器
5.Fingerprint-Based Random Sequence Generator基于人体指纹特征的随机序列发生器
6.Design and Implementation of The GOLD Sequence Generator Based on VHDL基于VHDL的GOLD序列发生器的设计与实现
7.Design of pseudo-random sequence generator based on FPGA基于FPGA伪随机序列发生器设计
8.Evolutionary Random Sequence Generator Based on LFSR基于LFSR的演化随机序列发生器
9.A Pulse-Train Generator Based on DIAC基于双向触发二极管的脉冲序列发生器
10.Design and Application of Random Sequence Generator Based on Chaotic Systems;基于混沌的随机序列发生器设计及其应用
11.A Random-sequence-generator Based on the Noise Signals of the Computer Power;一种利用计算机电源噪声的随机序列发生器
12.Design of a Pulse Sequence Generator in P-NMR Based on DDS and CPLD脉冲核磁共振硬脉冲序列发生器的设计
13.Design and Realization of a Pseudo Noise Bit Sequence Generator一种伪噪声比特序列发生器的设计与实现
14.Block cipher in output feedback mode is used to implement the end-to-end key stream generator.系统使用分组密码的输出反馈模式实现端-端密钥序列发生器。
15.sequential stroke character generator序列线段字符产生器
16.Uniformity of Distribution of Quadratic Generators over Elliptic Curves;椭圆曲线上二次发生器序列分布的一致性
17.Arranged in order of time of occurrence.按时间发生顺序排列的
18.relating to or arranged according to temporal order.关于时间发生顺序的，或按时间发生顺序排列的。
相关短句/例句
synthesized sequence generator综合时序发生器
3)Driving schedule generator驱动时序发生器
1.Design on driving schedule generator for high-speed CCD cameradriving and its achievement based on CPLD technology;高速CCD摄像机驱动时序发生器的设计及基于CPLD技术的实现
2.Design of driving schedule generator for area array CCD based on CPLD;基于CPLD的面阵CCD驱动时序发生器设计
3.Driving schedule generator is described with VHDL.在分析e2v公司的CCD47-20 Backthinned NIMO型CCD器件驱动时序关系的基础上,设计了可调帧频和曝光时间的空间面阵CCD相机驱动时序发生器及其硬件电路。
4)Sequential pulse generator时序脉冲发生器
5)memory timing generator内存时序发生器
6)bit sequence generator序列发生器
1.This paper presents a method ofbit sequence generator based on chaotic system,In order to overcome short period resulted from the finite precision in practical application,we amend the output of chaotic sequence periodically so as to lengthen the period of the sequence and make the period of the sequ.该文提出一种0-1序列发生器的设计方法,该方法通过混沌系统产生混沌序列并粗粒化,从而产生出符号序列(即0-1序列)。
延伸阅读
时序控制器分子式：CAS号：性质：设定点或参比信号自动按预定时间表给定的控制器。
